Premium ASIC design verification services
Welcome to Dragkon P.C.
Verification owner Security core IPs (Testplan extraction, Functional Coverage review and closure, Documentation enhancement, SoC/SW integration support)
Communicating with different teams throughout the chip’s cycle (SoC, master-users, SW, Emulation) to achieve IPs’ integration, project bring up and synchronization of deliverables
Delivered multiple projects in a timely manner on strict timelines
Verification owner Security core IPs (Testplan extraction, Functional Coverage review and closure, Documentation enhancement, SoC/SW integration support)
Communicating with different teams throughout the chip’s cycle (SoC, master-users, SW, Emulation) to achieve IPs’ integration, project bring up and synchronization of deliverables • Delivered multiple projects in a timely manner on strict timelines
Premium ASIC design verification services
Our expertise
Understanding
Understanding the customer needs and translate them into technical solution using Verilog/System Verilog
Complete SoC Verification
Enhance/develop the IPs documentation and programming guide
Technology
Enhance/develop the IPs documentation and programming guide
Premium ASIC design verification services
Contact us!
Dragkon P.C.
Highly responsive technical support, custom solutions!
Open Hours
Mon: 9:00 – 19:00
Sat – Sun: closed
Location
Thessaloniki, Greece
Telephone
(+30) 698 862 8105
Dragkon P.C. 